The present invention relates to a semiconductor device having a CMOS (Complementary Metal Oxide Semiconductor) transistor and a bipolar transistor formed on a single substrate and, more particularly, to a composite LSI (Large Scale Integrated Circuit) having the gate electrode of a MOS transistor and the emitter electrode of a bipolar transistor formed by sharing the same layers, and a method of producing the same.
Today, BiCMOS technologies are available for forming a bipolar transistor having a high current drive capability and a CMOS transistor feasible for high integration on a single chip. A BiCMOS structure is attracting increasing attention as an implementation for a small power, high speed LSI including both of digital and analog circuitry. However, a conventional BiCMOS procedure is undesirable from the cost standpoint beause it involves a great number of steps. Although various approaches to save the production steps have been proposed in the past, they have some problems left unsolved.
It is therefore an object of the present invention to provide a semiconductor device having a desirable characteristic, and a method of producing the same.
In accordance with the present invention, in a semiconductor device having a CMOS transistor and a bipolar transistor formed on a single semiconductor substrate, a gate electrode and an emitter electrode included in the CMOS transistor and bipolar transistor, respectively, are formed by sharing the same polysilicon layers. An impurity contained in an nMOS gate electrode and an emitter electrode of the bipolar transistor has a lower concentration than an emitter diffusion layer formed in the intrinsic base region of the bipolar transistor.
Also, in accordance with the present invention, a method of producing a semiconductor device has the steps of forming an emitter contact hole, introducing an impurity via the emitter contact hole by ion implantation to thereby form an emitter diffusion region, forming a gate electrode and an emitter electrode of a MOS transistor, effecting formation of an nMOS source-drain and introduction of an impurity into an emitter electrode of a bipolar transistor at the same time, effecting first annealing, effecting formation of a pMOS source-drain and introduction of an impurity into an extrinsic base region of the bipolar transistor at the same time, and effecting second annealing.